The present invention provides a filter apparatus, an integrated circuit having a filter apparatus, and devices implementing a filter apparatus.
FIG. 1a illustrates an FIR filter apparatus which can be used, for example, in the processing of digital signals. The input signal S100 can be supplied in the form of a symbol sequence x(t). The output signal S200 is generated after processing inside the filter apparatus. The output signal S200 likewise has the form of a symbol sequence y(t). The filter apparatus can be used, for example, in the processing of serial signals. A serial signal includes a sequence of concatenated symbols, each symbol having a symbol duration T0. If the filter apparatus is clocked, the clock signal will have a clock frequency of
  f  =      1          T      0      in accordance with the conventional implementation (this corresponds to a full-rate system, but implementations where
  f  =      1          2      ⁢              T        0            may likewise be used, which corresponds to a half-rate implementation).
The conventional filter apparatus will be described in more detail below. The filter apparatus has a multiplicity of delay elements 150 and a multiplicity of filter coefficients b0, b1, b2. These filter coefficients b0, b1, b2 are the actual factors which are used to process the input signal.
This FIR filter apparatus can be implemented, for example, in a transmitter in order to predistort the transmission signal S100, for example. If this filter apparatus is intended to be used in a receiver, the filter is referred to as an “equalization filter”. According to FIG. 1a, the FIR filter apparatus is illustrated in the form of a digital filter apparatus. The filter coefficients b0, b1 and b2 can be set using the transmission channel characteristics, for example. That is to say the FIR filter apparatus receives information relating to the quality of the transmission channel and the filter coefficients b0, b1, b2 are accordingly set using this information. The transmission channel is used to transmit the output sequence S200 to a receiver. The transmission channel is not illustrated in FIG. 1a. 
The FIR filter apparatus also has an adder 190. This adder 190 is used to add the sequences S100, S110 and S120, which have been multiplied by the filter coefficients, in order to obtain the filtered output sequence S200.
In mathematical form, the transfer function of the FIR filter apparatus is thus:
      H    ⁡          (      z      )        =                    Y        ⁡                  (          z          )                            X        ⁡                  (          z          )                      =                  b        0            +                        b          1                ⁢        z            +                        b          2                ⁢                  z          2                    +      …      +                        b          n                ⁢                  z          n                    
The factor bn is intended to represent the fact that the FIR filter apparatus can contain a multiplicity of filter coefficients b0 . . . bn. The power of the z factor is intended to represent the respective delay of the respective signal. For example, z2 corresponds to a delay by two symbol lengths T0. In this case, the mathematical representation of the transfer function H(z) corresponds to a representation in the complex variable domain and frequency domain.
According to this illustration, a latency of the FIR filter apparatus which corresponds to two symbol durations T0 results. This latency results from the use of two delay devices 150. Each of these delay devices delays the signal S100 by one symbol duration or symbol length. The first delay device delays the signal S1100 and generates the signal S110. The signal S110 may be represented in a general form as x(t−T0). This signal S110 is then forwarded to the filter coefficient b 1 and is accordingly multiplied by the latter. The signal S120 corresponds to the delay of the input signal S100 by two symbol durations. The signal S120 thus has the general form x(t−2T0). This signal S120 is then likewise forwarded to a corresponding filter coefficient b2 and is multiplied by the latter. The signals which have thus been multiplied are forwarded to the adder device 190 and are added in order to generate the output signal or the output sequence S200.
According to this illustration, the zeroth filter coefficient b0 receives the input signal S100 which has not been delayed.
FIG. 1b illustrates the frequency response of the conventional filter apparatus illustrated in FIG. 1a. The frequency response of the channel or the channel characteristics is/are likewise additionally diagrammatically illustrated. An FIR filter apparatus having four filter coefficients b0 to b3 was selected for this illustration.
The frequency in GHz is illustrated on the X axis of the illustration and the attenuation of the apparatus or of the channel in dB is illustrated on the Y axis. The channel characteristics C10 are diagrammatically illustrated and correspond to a diagrammatic illustration of data which are determined/measured in practice or using experiments. Therefore, it can be seen that the transmission channel has low-pass filter characteristics. The low frequencies are forwarded with little attenuation and, in contrast, the higher frequencies (above 5 GHz in this case) are heavily attenuated. The attenuation continues to increase as the frequency increases. Therefore, the filter apparatus inside the transmitter must accordingly amplify the higher frequencies so that the symbols can be transmitted via the transmission channel without distortion or errors. In order to achieve this, the filter apparatus illustrated in FIG. 1a can be dimensioned in such a manner that it has a frequency response in accordance with the frequency response illustrated in the curve C11. In this case, only two filter coefficients or taps are needed. In this design, the coefficient b1 corresponds to the negated coefficient b0 and the other remaining coefficients are set to be equal to 0. In the case of the curve C12, the second coefficient b2 is equated to the negated coefficient b0 and, in the case of the curve C13, the coefficient b3 is accordingly set in an analogous manner. These curves likewise correspond to frequency responses of the filter apparatus. This illustration can be used to diagrammatically read precisely the frequency response of the respective filter tap.
Delay times of T0=100 ps are used in the FIR filter for this illustration. A clock frequency of the clocked delay devices of 10 GHz thus results. A data rate of 10 Gb/s consequently results. As mentioned above, it is necessary to compensate for the transmission characteristics C10 of the transmission channel. In this case, it is necessary to compensate for the low-pass filter behaviour of the transmission channel. This is achieved by setting the filter apparatus as a high-pass filter with the aid of the filter coefficients. The spectral components of the signal above 5 GHz must be amplified before being transmitted to the transmission channel. The frequency profile for b0=−b1 performs this task up to 5 GHz. The other coefficient settings according to the curves C12 and C13 no longer have a pure high-pass filter behaviour in the relevant spectral range of the signal. The channel C10 can be sufficiently compensated for with a higher-order filter using positive and negative coefficients. This corresponds to greater circuit complexity and thus higher costs.
For these and other reasons, there is a need for the present invention.